The STM32 microcontroller comes with two built-in watchdog modules: the Independent Watchdog (IWDG) and the Window Watchdog (WWDG). These modules are essential for ensuring system reliability by automatically resetting the microcontroller if the software becomes unresponsive or encounters an error.
The basic principle of a watchdog is to monitor the execution of the program. If the program runs into an infinite loop or gets stuck due to external interference, the watchdog will trigger a reset. This is done through a timer that counts down from a set value. If the counter reaches zero before being "fed" (reloaded), a reset signal is sent to restart the MCU.
The main purpose of the watchdog is to detect and recover from software faults. When the counter reaches a specific timeout value, it either triggers an interrupt (for WWDG only) or generates a system reset. To prevent unnecessary resets, the program must periodically reload the watchdog counter, usually using a timer. This ensures that as long as the program is running correctly, the watchdog will not reset the system.
For the **Independent Watchdog (IWDG)**:
- It uses a separate internal RC oscillator, allowing it to function even in low-power modes like stop or standby.
- The IWDG has a free-running down counter that starts at 0xFFF when enabled.
- To activate the IWDG, you write 0xCCCC to the key register (IWDG_KR). Once enabled, the counter starts decrementing.
- To prevent a reset, you must write 0xAAAA to the key register, which reloads the counter from the reload register (IWDG_RLR).
- A typical configuration involves setting the prescaler, reload value, and enabling the watchdog.
Example code:
```c
void IWDG_Configuration(void) {
IWDG_WriteAccessCmd(IWDG_WriteAccess_Enable); // Enable write access
IWDG_SetPrescaler(IWDG_Prescaler_256); // Set prescaler to 256
IWDG_SetReload(781); // Set reload value
IWDG_ReloadCounter(); // Reload the counter
IWDG_Enable(); // Enable the watchdog
}
```
For the **Window Watchdog (WWDG)**:
- Unlike IWDG, WWDG has a "window" during which the counter must be reloaded. If the counter is reloaded outside this window, a reset occurs.
- The WWDG also supports early wake-up interrupts (EWI), which can be used to reload the counter before it reaches the reset threshold.
- The watchdog is always disabled after a system reset. To enable it, the WDGA bit in the WWDG_CR register must be set to 1, and once enabled, it cannot be disabled without a reset.
Example code:
```c
void WWDG_Configuration(void) {
RCC_APB1PeriphClockCmd(RCC_APB1Periph_WWDG, ENABLE); // Enable clock
WWDG_SetPrescaler(WWDG_Prescaler_8); // Set prescaler
WWDG_SetWindowValue(0x42); // Set window value
WWDG_Enable(0x7F); // Enable watchdog
WWDG_ClearFlag(); // Clear flag
WWDG_EnableIT(); // Enable EWI interrupt
}
```
In summary, both IWDG and WWDG serve as critical tools for maintaining system stability. While IWDG is simpler and more suitable for general use, WWDG offers more control and precision, making it ideal for applications where timing and safety are crucial. Understanding their configurations and behaviors is essential for developing robust embedded systems.
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