Silicon Labs (NASDAQ: SLAB), often referred to as a core technology provider, has launched a new family of high-performance, multi-channel clock products designed to reduce jitter for 4.5G and Ethernet-based eCPRI wireless applications. The new Si5381/82/86 series utilizes Silicon Labs' proven DSPLL technology to deliver an advanced clocking solution that integrates both 4G/LTE and Ethernet clocks into one chip. These highly integrated devices replace multiple traditional clock components like VCXOs and separate clock ICs, making them ideal for use in small cells, DAS systems, μ-BTS, and BBU equipment.
As service providers begin deploying 5G networks, they are increasingly relying on small cells, DAS, μ-BTS, and backhaul solutions to enhance indoor coverage and capacity. With the shift toward Ethernet-based eCPRI for better connectivity between BBUs and remote radio heads, network designers face challenges in managing cost, power, and size. The Si538x family addresses these issues by combining 4G/LTE and Ethernet clocks in a single IC, reducing power consumption by up to 55% and board space by 70% compared to conventional solutions.
James Wilson, Senior Director of Marketing at Silicon Labs, stated, "The rollout of HetNet and eCPRI equipment is driving the transition to 5G. By using the Si538x wireless clock, system designers can minimize cost, power, and complexity in small cells, DAS, and μ-BTS. Our DSPLL-based Si538x is the first clock IC to combine low-noise 4G/LTE and low-jitter Ethernet clocks, and we're excited to see our customers leverage this technology to optimize HetNet designs and speed up 4.5G deployment."
The Si538x is optimized for HetNet devices, offering a reference clock for small cells and DAS systems that require synchronization for 4G/LTE, baseband processing, and Ethernet/Wi-Fi connections. The Si5386 uses a compact, single-chip design with a low-phase-noise DSPLL, eliminating the need for discrete components like VCXOs and loop filters. It also includes five MultiSynth fractional clock synthesizers for flexible Ethernet and baseband clocking.
For baseband units, which demand multiple independent clock domains, the Si5381/82 models integrate a high-speed, low-phase-noise DSPLL to support frequencies up to 3 GHz. They feature multiple flexible DSPLLs for Ethernet and general-purpose clocking, all without requiring external oscillators. These devices are available in a 9mm x 9mm 64-LGA package, saving valuable board space. Additionally, the Si538x supports seamless clock switching, ensuring minimal phase transients and maintaining system stability. Like other Silicon Labs clock products, they can be configured using the intuitive ClockBuilder Pro software.
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