The IEEE 802.15.4-2003 protocol specifies 27 communication channels: 1 at 868 MHz with a rate of 20 kbps; 10 at 915 MHz with a rate of 40 kbps; 16 at 2.45 GHz with a rate of 250 khps. It supports star, tree and mesh topologies. According to the function, there are two different types of devices in the network: full function (FFD) and simplified function (RFD). In order to simplify the protocol, IEE: E 802.15.4-2003 satisfies the OSI reference model, specifying the physical layer and MAC layer, each layer completes its specified tasks, and provides service task interfaces to the upper layer. The data communication methods in the protocol can be divided into two types: direct data transmission and indirect data transmission, which are packaged and sent in the form of data frames. The network can work in superframe and non-superframe modes. In order to improve its reliability, CSMA / CA's media access control mechanism, confirmation frame response method and CRC-16 ITU check mechanism are used, and some data can be added. Encryption and security control mode. For low power consumption and low cost, there are only 14 service primitives in the physical layer and 35 primitives in the MAC layer. Compared with Bluetooth, these primitives are only 1/3 of it.
1 Hardware circuit design
Under normal circumstances, the basic structure of IEEE802.15.4 network equipment is shown in Figure 1. The power of the system is usually provided by the battery, or it can be supplied by the voltage regulator module. The RF transceiver chip is responsible for the generation and reception and demodulation of radio frequency signals. Its reference clock is provided by an external high-precision crystal oscillator; at the same time, it must implement some basic functions of the physical layer and the MAC layer, such as codec, channel selection, power control, and reception Machine energy detection (RSSI), link quality indicator (LQI), idle channel assessment (CCA), hardware CRC check, etc. Under the premise of realizing these basic functions, the RF chip should try to achieve low power consumption, high sensitivity and small package. The microcontroller must have abundant resources to complete the control of the RF chip and the real-time response to the sensors, various application interfaces and user interfaces. Usually the protocol stack needs about 32 KB of storage space.
1.1 AT86RF230 performance and internal structure
Atmcl's AT86RF230 is a radio frequency transceiver chip compatible with ZigBee / IEEE802.15.4. It works in the 2.4 GHz ISM band, has a link budget of 104dB, a receiving sensitivity of -101 dB and a transmission power of 3 dB, thereby reducing the total number of node devices required in the network and greatly reducing the networking cost of the IEEE 802.15.4 system . All key RF components (except antenna, crystal, and decoupling capacitors) are integrated in one chip, and the package form is a 32-pin QFN package with 5 mm & TImes; 5 mm & TImes; 0.9 mm size. The device formed by the chip requires only 6 external components, and the functional block diagram is shown in Figure 2. The terminal node is usually battery-powered, with a current consumption of 17 mA in transmit mode, 15 mA in receive mode, and only 0.7 μA in sleep mode; the operating voltage can reach 1.8 to 3.6V, and there is an integrated 1.8V LDO inside. There are 35 8-bit registers that can be accessed through SPI control timing within the AT86RF230, and there are 8 basic states during operation (which can be expanded to 14 as needed). The on-chip buffer for sending data and receiving data is 129 bytes and 130 bytes, which can meet the requirements of the maximum frame length of 127 bytes specified by IEEE802.15.4 protocol. You need to add 2 bytes of CRC16 check code when sending, and 1 byte of link quality indication when receiving.
1.2 The hardware circuit of network equipment
The schematic diagram of the main part of the hardware is shown in Figure 3. The digital interface of the module is the SPI interface between ATmega128l and AT86RF230 and four other control lines. AT-megal28l is Atmel's 8-bit high-performance AVR microcontroller. Its basic features are: RISC architecture, with 135 instructions, throughput rate up to 16MIPS when working at 16MHz; 128 KB Flash, 4 KB on-chip E2PROM and 8 KB SRAM on-chip, you can download programs through ISP or JTAG; work The frequency can be up to 16 MHz, the working voltage is 1.8-5.5V, and there is only 0.1μA working current in power-down mode. In this design, ATmegal281 works at an internal oscillation frequency of 8 MHz. If you want to use an external clock signal synchronized with AT86RF230, then the CLKM pin should be connected to the XTAL1 pin of ATmegal281, and the fuse bit should be set to an external clock. The interrupt signals of various working states of AT86RF230 are controlled by the IRQ pin. Here, the ICPL pin received from ATmegal28l generates a capture interrupt, because the capture interrupt can reduce the interference of the outside world by setting the noise cancellation method, thereby improving the reliability of the interrupt. Refer to the reference for specific methods of AT86RF230 register SPI read / write timing, state transition diagram and various interrupt control methods. It should also be noted that the long-term operating frequency stability of the external crystal oscillator X1 connected to the AT86RF230 should be less than or equal to 40 ppm, and select the appropriate load capacitor according to the driving capacity of the crystal oscillator and the chip.
Microphone:
Microphone is a kind of electrets microphone unit for audio input. It is a transducer which can transduce audio signal into electric signal. It is also called receiver. It is widely used in many industries which need audio input.
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FAQ
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