Application of ADSP2189M in the development of automatic ship identification system

introduction

The AIS system is a collision avoidance system for exchanging data using the TDMA technology in the offshore mobile VHF band. The product development is based on the ITU-R M1371 protocol promulgated by the International Maritime Organization. In the development, ADSP2189M is used as its data processing platform to complete various functions such as data processing, conversion, and time slot division. The mode of the system is shown in Figure 1.

The GMSK signal is received by the radio at two frequency points of 161.975MHz and 162.025MHz, and the analog data is converted into a digital signal by the GMSK modulation and demodulation chip, and the data stream is determined by the upper computer to determine the correct data, and the data segment is deleted. The start, fill and end bits send data to the DSP through the parallel port. The DSP completes the processing and analysis of the received data, establishes the time slot table of the entire sea area, completes the TDMA network login and maintenance, and then re-related the data. Different formats are sent to different serial port outputs. According to ITU-R M.1371 protocol, ITDMA (incremental time division multiple access) is used to access the network and run continuously in SOTDMA (self-controlled time division multiple access) mode to achieve TDMA of the entire network. Integrity. Therefore, the signal processing unit is in an important position in the system.

Figure 1 DSP and external device interface

ADSP2189M chip

The ADSP2189M chip is a fixed-point DSP with an instruction cycle of 13.3ns and a running speed of 75MIPS. The processor includes an arithmetic/logic unit (ALU), a multiplier/accumulator (MAC), and a barrel shifter. The memory uses a Harvard architecture with 48K PRAM and 32K DRAM. Two SPORT synchronous serial ports, a timer and a host interface can be directly connected to the host processor. The DMA interface includes an internal DMA interface (IDMA) and a byte DMA interface (BDMA).

Hardware design of 2189M in AIS system

Part of the circuit is shown in Figure 2.

· The chip is connected to a 33M crystal, and its internal frequency is automatically multiplied to 66M;

· A synchronous serial port SPORT is connected to the external MCU, and the pin is connected to a pull-up resistor;

· Set SPORT1 to the second working mode, and use the software to simulate the UART of the I/O port, connect with the MAX232 chip, and send the data to the simple display;

· Connected to the MCU by IDMA, 16 parallel lines are connected, the startup mode is set to IDMA mode, and the four MODEA~D settings are 1, 0, 1, 0;

· The steps to complete the IDMA boot load are as follows;

The four debug pins of PWD, EBR, BR, and ERSET must be connected with external pull-up resistors;

Finally write the value of PM (0X0000) and the program starts automatically.

Part of the circuit diagram of the AIS system

Figure 2 Part of the circuit diagram of the AIS system

Figure 3 serial port receiving timing diagram

Figure 4 time slot division diagram

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